Commit 694694f1 authored by Paul McCarthy's avatar Paul McCarthy 🚵
Browse files

Merge branch 'rel/3.6.2' into 'v3.6'

Rel/3.6.2

See merge request fsl/fslpy!300
parents 9dceb5d0 7173b0af
Pipeline #9489 passed with stages
in 1 minute and 23 seconds
......@@ -3,7 +3,7 @@ order.
3.6.1 (Thursday 27th April 2021)
3.6.2 (Wednesday 23rd June 2021)
--------------------------------
......@@ -11,6 +11,18 @@ Changed
^^^^^^^
* The ``fsl.wrappers.fast`` wrapper passes ``-v`` to ``fast`` if ``v=True`` or
``verbose=True`` is specified.
3.6.1 (Thursday 27th May 2021)
------------------------------
Changed
^^^^^^^
* Removed the ``dataclasses`` backport from requirements (!297).
......
......@@ -47,7 +47,7 @@ import re
import string
__version__ = '3.6.1'
__version__ = '3.6.2'
"""Current version number, as a string. """
......
......@@ -50,7 +50,7 @@ def fast(imgs, out='fast', **kwargs):
'n_classes' : 'class',
}
cmd = ['fast', '-v', '--out=%s' % out]
cmd = ['fast', '--out=%s' % out]
cmd += wutils.applyArgStyle('--=',
valmap=valmap,
argmap=argmap,
......
......@@ -327,13 +327,16 @@ def test_fast():
cmd = op.join(fsldir, 'bin', 'fast')
result = fw.fast('input', 'myseg', n_classes=3)
expected = [cmd, '-v', '--out=myseg', '--class=3', 'input']
expected = [cmd, '--out=myseg', '--class=3', 'input']
assert result.stdout[0] == ' '.join(expected)
result = fw.fast(('in1', 'in2', 'in3'), 'myseg', n_classes=3)
expected = [cmd, '-v', '--out=myseg', '--class=3', 'in1', 'in2', 'in3']
expected = [cmd, '--out=myseg', '--class=3', 'in1', 'in2', 'in3']
assert result.stdout[0] == ' '.join(expected)
result = fw.fast(('in1', 'in2', 'in3'), 'myseg', n_classes=3, verbose=True)
expected = [cmd, '--out=myseg', '--class=3', '--verbose', 'in1', 'in2', 'in3']
assert result.stdout[0] == ' '.join(expected)
......@@ -390,10 +393,10 @@ def test_tbss():
def test_fsl_prepare_fieldmap():
with asrt.disabled(), run.dryrun(), mockFSLDIR(bin=('fsl_prepare_fieldmap',)) as fsldir:
fpf = op.join(fsldir, 'bin', 'fsl_prepare_fieldmap')
result = fw.fsl_prepare_fieldmap(phase_image='ph',
magnitude_image='mag',
out_image='out',
deltaTE=2.46,
nocheck=True)
result = fw.fsl_prepare_fieldmap(phase_image='ph',
magnitude_image='mag',
out_image='out',
deltaTE=2.46,
nocheck=True)
expected = (fpf, ('SIEMENS', 'ph', 'mag', 'out', '2.46', '--nocheck'))
assert checkResult(result.stdout[0], *expected)
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